Score contribution per author:
α: calibrated so average coauthorship-adjusted count equals average raw count
This paper proposes a novel approach for the computation of dynamic stochastic equilibrium models. We design an FPGA specialized in the computation of a Bellman equation via value function iteration (VFI). Our hardware approach exhibits significant speed gains vis-à-vis GPU-based data-parallelization techniques. The speed gains arise from two layers of parallelism, accessible to hardware developers: instruction-level and pipeline parallelism at the logical resources level. By and large, the paper documents significant computational speed gains from hardware specialization, so far unexplored by the macroeconomic literature.